Electronic Design

Design-For-Test The Smart Way: dFT With A "Big T" And A "Little d"

Design-for-test, or DFT, should facilitate high-quality test, not change the design. Test techniques and strategies need to supply a high-quality test that screens out defective devices, avoiding ...

ProtoPie Launches Integrated User Testing to Bridge the Gap Between Prototypes and Real-World Validation

ProtoPie, the industry leader in high-fidelity prototyping, today announced the official launch of User Testing. As product cycles compress and the cost of design errors rises, ProtoPie is removing ...
Electronic Design

ATE – Design for Test – Putting Memory to the Test in Nanometer Designs

Memory test at-speed isn't easy but can be achieved by balancing test selection, area overhead, and test-time constraints. The semiconductor industry has intensified its focus on yield issues to meet ...
EDN

Smart test for nanometer designs

When semiconductor devices had geometries of 0.18 microns and larger, most defects manifested themselves as static faults. Test strategies based on stuck-at fault-model scan patterns and standard ...
InfoQ

Test-Driven Development: Really, It’s a Design Technique

A monthly overview of things you need to know as an architect or aspiring architect. Unlock the full InfoQ experience by logging in! Stay updated with your favorite authors and topics, engage with ...
Health Affairs

Complex Clinical Laboratory Tests Can Benefit From Design Controls

Diagnostic test developers, including clinical laboratories, responded to the COVID-19 pandemic with inspiring creativity to meet patient testing needs. These developers found unique ways to enable ...
Semiconductor Engineering

Analysis Of Multi-Chiplet Package Designs And Requirements For Production Test Simplification

In recent years there has been a sharp rise of multi-die system designs. Numerous publications targeting a large variety of applications exist in the public domain. One presentation [2] on the IEEE’s ...